ADNESC

ARINC 664 End System Controller

  • Airworthiness: Development process fully compliant with RTCA DO-254 DAL A
  • Target Device Independent: Developed iwth generic VHDL code
  • High-performance multi-host interface support (up to 400 Mbit/s)
  • Embedded SRAM / external QDR II memory controllers
  • Built-in safety monitoring and failure detection mechanisms (SECDED / BIST)
  • Performance in reception of 100%
  • No jitter in transmission
  • Up to 2048 Virtual Links in reception
  • No limit for Virtual Links in transmission (depends on configuration table size)
  • Complete DO-254 Certification Package
  • Compliant with main aircraft manufacturers
  • High modularity for future  « fieldbus » oriented functionality

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